Verification Engineer
Start Date: July 2024
Contract Length: 6 Months
Location / Remote Working: Hybrid, Manchester; 2 Days in office
Pay Rate: £390 - £420 per day - Inside IR35
Our client is a well-known semiconductor manufacturer who is looking for a Verification Engineer to join their hardware team. They are looking for someone who has solid experience with RTL, Jasper and SystemVerilog.
Responsibilities:
- Identifying and developing new hardware simulations
- Formal property verification
- Architect and implement verification environments
- Improve on existing testbenches
- Writing assertations using SVA with Cadence
Essential Skill Set:
- SystemVerilog Assertations (SVA)
- RTL, Jasper
- Cadence/Mentor/Synopsys
- Property-based model-checking
Desirable Skill Set:
- Multiprocessing microarchitecture
- AMBA5 CHI, AMBA4 ACE or AXI